MiSTer SNES Core Update Refines CX4 Chip Timing for Mega Man X Titles

The MiSTer FPGA project has merged a specific update for its Super Nintendo core that targets the behavior of the CX4 co-processor. The changes, submitted by contributor AkiteruSDA, address cache timing inconsistencies that could affect the accuracy of games relying on Capcom’s specialized chip.

The Math Behind the Maverick Hunters

For those who don’t memorize SNES motherboard schematics for fun, the CX4 is a math co-processor developed by Capcom and Hitachi. Unlike the more famous Super FX chip, which powered full 3D experiences like Star Fox, the CX4 was a workhorse designed primarily for trigonometric calculations and wireframe effects.

Capcom used this chip sparingly. It appeared in only two major retail releases: Mega Man X2 and Mega Man X3. If you recall the wireframe sword boss in X2 or the rotating vector graphics in the intro stages, that was the CX4 doing the heavy lifting. The SNES’s stock Ricoh 5A22 CPU was notoriously sluggish compared to the Sega Genesis’s Motorola 68000, so developers often relied on these on-cartridge chips to push extra polygons or handle complex math without slowing the game to a crawl.

Who cares? Mister nerds like me.

The specific technical change regarding address $7F48 is significant for accuracy. In the context of the CX4, this address is involved in controlling the instruction cache. By making the cache enable "unconditional" on writes to this address, the developer is likely removing a condition that was preventing the cache from activating in certain edge cases. When the cache behavior doesn’t match the original silicon, the emulated chip might stall or execute instructions at the wrong speed.

In FPGA development, timing is the entire ballgame. If a branch instruction takes one cycle longer on the MiSTer than it did on the real Hitachi chip, the audio might desync, a visual effect might flicker, or in rare cases, the game logic could break entirely. These are the kinds of invisible fixes that distinguish high-level software emulation from the cycle-accurate hardware simulation MiSTer aims for.

The Never-Ending Pursuit of Accuracy

This update highlights the granular nature of preservation work on the MiSTer platform. The SNES core is widely considered one of the most mature cores on the system, yet developers are still finding room for improvement in how it handles obscure co-processors. It’s easy to emulate the main CPU; it’s much harder to perfectly replicate the timing of a proprietary math chip that Capcom used for two games in 1994 and 1995.